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2005 Microchip Technology Inc.
Preliminary
DS41265A-page 155
PIC16F946
12.2
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-4. The
source impedance (RS) and the internal sampling
switch (RSS) impedance directly affect the time
required to charge the capacitor CHOLD. The sampling
switch (RSS) impedance varies over the device voltage
(VDD), see Figure 12-4. The maximum recom-
mended impedance for analog sources is 10 k
Ω.
As the impedance is decreased, the acquisition time
may be decreased. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To
calculate
the
minimum
acquisition
time,
Equation 12-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, TACQ, see
the “PICmicro Mid-Range MCU Family Reference
Manual” (DS33023).
EQUATION 12-1:
ACQUISITION TIME
TACQ
Amplifier Settling Time
Hold Capacitor Charging Time
Temperature Coefficient
++
=
TAMP
TC
TCOFF
++
=
2s
TC
Temperature - 25°C
() 0.05s/°C
()
[]
++
=
TC
CHOLD RIC
RSS
RS
++
() ln(1/2047)
–
=
10pF 1k
Ω 7kΩ 10kΩ
++
()
–
ln(0.0004885)
=
1.37
=
s
TACQ
2S
1.37S
50°C- 25°C
() 0.05S/°C
()
[]
++
=
4.67S
=
VAPPLIED 1
e
Tc
–
RC
---------
–
VAPPLIED 1
1
2047
------------
–
=
VAPPLIED 1
1
2047
------------
–
VCHOLD
=
VAPPLIED 1
e
TC
–
RC
----------
–
VCHOLD
=
;[1] VCHOLD charged to within 1/2 lsb
;[2] VCHOLD charge response to VAPPLIED
;combining [1] and [2]
Where CHOLD is charged to within 1/2 lsb:
Solving for TC:
Therefore:
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (CHOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 k
Ω. This is required to meet the pin
leakage specification.
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